Low Power Methodology Manual (Record no. 58300)

MARC details
000 -LEADER
fixed length control field 04362nam a22004935i 4500
001 - CONTROL NUMBER
control field 978-0-387-71819-4
003 - CONTROL NUMBER IDENTIFIER
control field DE-He213
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20250710084013.0
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION
fixed length control field cr nn 008mamaa
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 100301s2007 xxu| s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9780387718194
-- 99780387718194
024 7# - OTHER STANDARD IDENTIFIER
Standard number or code 10.1007/978-0-387-71819-4
Source of number or code doi
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.3815
Edition information 23
100 1# - MAIN ENTRY--PERSONAL NAME
Personal name Keating, Michael.
Relator term author.
245 10 - TITLE STATEMENT
Title Low Power Methodology Manual
Medium [recurso electrónico] :
Remainder of title For System-on-Chip Design /
Statement of responsibility, etc. by Michael Keating, David Flynn, Robert Aitken, Alan Gibbons, Kaijian Shi.
264 #1 - PRODUCTION, PUBLICATION, DISTRIBUTION, MANUFACTURE, AND COPYRIGHT NOTICE
Place of production, publication, distribution, manufacture Boston, MA :
Name of producer, publisher, distributor, manufacturer Springer US,
Date of production, publication, distribution, manufacture, or copyright notice 2007.
300 ## - PHYSICAL DESCRIPTION
Extent XVI, 304 p.
Other physical details online resource.
336 ## - CONTENT TYPE
Content type term text
Content type code txt
Source rdacontent
337 ## - MEDIA TYPE
Media type term computer
Media type code c
Source rdamedia
338 ## - CARRIER TYPE
Carrier type term recurso en línea
Carrier type code cr
Source rdacarrier
347 ## - DIGITAL FILE CHARACTERISTICS
File type text file
Encoding format PDF
Source rda
505 0# - FORMATTED CONTENTS NOTE
Formatted contents note Standard Low Power Methods -- Multi-Voltage Design -- Power Gating Overview -- Designing Power Gating -- Architectural Issues for Power Gating -- A Power Gating Example -- IP Design for Low Power -- Frequency and Voltage Scaling Design -- Examples of Voltage and Frequency Scaling Design -- Implementing Multi-Voltage, Power Gated Designs -- Physical Libraries -- Retention Register Design -- Design of the Power Switching Network.
520 ## - SUMMARY, ETC.
Summary, etc. "Tools alone aren't enough to reduce dynamic and leakage power in complex chip designs - a well-planned methodology is needed. Following in the footsteps of the successful Reuse Methodology Manual (RMM), authors from ARM and Synopsys have written this Low Power Methodology Manual (LPMM) to describe [such] [a] low-power methodology with a practical, step-by-step approach." Richard Goering, Software Editor, EE Times "Excellent compendium of low-power techniques and guidelines with balanced content spanning theory and practical implementation. The LPMM is a very welcome addition to the field of low power SoC implementation that has for many years operated in a largely ad-hoc fashion." Sujeeth Joseph, Chief Architect - Semiconductor & Systems Solutions Unit, Wipro Technologies "The LPMM enables broader adoption of aggressive power management techniques based on extensive experience and silicon example with real data that every SOC designer can use to meet the difficulties faced in managing the power issues in deep submicron designs" Anil Mankar, Sr VP Worldwide Core Engineering and Chief Development Officer, Conexant Systems Inc. "Managing power, at 90nm and below, introduces significant challenges to design flow. The LPMM is a timely and immediately useful book that shows how combination of tools, IP and methodology can be used together to address power management." Nick Salter, Head of Chip Integration, CSR plc. ABOUT THE AUTHORS: Michael Keating is a Synopsys Fellow in the company's Advanced Technology Group, focusing on IP development methodology, hardware and software design quality and low power design. David Flynn is an ARM R&D Fellow and has been with the company since 1991, specializing in low power System-on-Chip IP deployment and methodology. Robert Aitken is an ARM R&D Fellow. His areas of responsibility include memory architecture, design for testability and design for manufacturability. Alan Gibbons is a Principal Engineer at Synopsys, with a focus on development of advanced methodology and technology for ARM processor-based system design. Kaijian Shi is a Principal Consultant in the Professional Services Group of Synopsys, specializing in low power design methodology and implementation.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element ENGINEERING.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element COMPUTER HARDWARE.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element ELECTRONICS.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element SYSTEMS ENGINEERING.
650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element ENGINEERING.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element CIRCUITS AND SYSTEMS.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element ELECTRONICS AND MICROELECTRONICS, INSTRUMENTATION.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element ELECTRONIC AND COMPUTER ENGINEERING.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element COMPUTER HARDWARE.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Flynn, David.
Relator term author.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Aitken, Robert.
Relator term author.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Gibbons, Alan.
Relator term author.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Shi, Kaijian.
Relator term author.
710 2# - ADDED ENTRY--CORPORATE NAME
Corporate name or jurisdiction name as entry element SpringerLink (Online service)
773 0# - HOST ITEM ENTRY
Title Springer eBooks
776 08 - ADDITIONAL PHYSICAL FORM ENTRY
Relationship information Printed edition:
International Standard Book Number 9780387718187
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier <a href="http://dx.doi.org/10.1007/978-0-387-71819-4">http://dx.doi.org/10.1007/978-0-387-71819-4</a>
Public note Ver el texto completo en las instalaciones del CICY
912 ## -
-- ZDB-2-ENG
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Source of classification or shelving scheme Dewey Decimal Classification
Koha item type Libros electrónicos
Holdings
Lost status Source of classification or shelving scheme Damaged status Not for loan Collection Home library Current library Shelving location Date acquired Total checkouts Full call number Date last seen Price effective from Koha item type
  Dewey Decimal Classification     Libro electrónico CICY CICY Libro electrónico 10.07.2025   621.3815 10.07.2025 10.07.2025 Libros electrónicos