Low-Power High-Level Synthesis for Nanoscale CMOS Circuits (Record no. 58768)

MARC details
000 -LEADER
fixed length control field 03864nam a22005055i 4500
001 - CONTROL NUMBER
control field 978-0-387-76474-0
003 - CONTROL NUMBER IDENTIFIER
control field DE-He213
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20250710084024.0
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION
fixed length control field cr nn 008mamaa
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 100301s2008 xxu| s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9780387764740
-- 99780387764740
024 7# - OTHER STANDARD IDENTIFIER
Standard number or code 10.1007/978-0-387-76474-0
Source of number or code doi
100 1# - MAIN ENTRY--PERSONAL NAME
Personal name Patra, Priyardarsan.
Relator term author.
245 10 - TITLE STATEMENT
Title Low-Power High-Level Synthesis for Nanoscale CMOS Circuits
Medium [recurso electrónico] /
Statement of responsibility, etc. by Priyardarsan Patra, Elias Kougianos, Nagarajan Ranganathan, Saraju P. Mohanty.
264 #1 - PRODUCTION, PUBLICATION, DISTRIBUTION, MANUFACTURE, AND COPYRIGHT NOTICE
Place of production, publication, distribution, manufacture Boston, MA :
Name of producer, publisher, distributor, manufacturer Springer US,
Date of production, publication, distribution, manufacture, or copyright notice 2008.
300 ## - PHYSICAL DESCRIPTION
Other physical details online resource.
336 ## - CONTENT TYPE
Content type term text
Content type code txt
Source rdacontent
337 ## - MEDIA TYPE
Media type term computer
Media type code c
Source rdamedia
338 ## - CARRIER TYPE
Carrier type term recurso en línea
Carrier type code cr
Source rdacarrier
347 ## - DIGITAL FILE CHARACTERISTICS
File type text file
Encoding format PDF
Source rda
505 0# - FORMATTED CONTENTS NOTE
Formatted contents note High-Level Synthesis Fundamentals -- Power Modeling and Estimation at Transistor and Logic Gate Levels -- Architectural Power Modeling and Estimation -- Power Reduction Fundamentals -- Energy or Average Power Reduction -- Peak Power Reduction -- Transient Power Reduction -- Leakage Power Reduction -- Conclusions and Future Direction.
520 ## - SUMMARY, ETC.
Summary, etc. Low-Power High-Level Synthesis for Nanoscale CMOS Circuits addresses the need for analysis, characterization, estimation, and optimization of the various forms of power dissipation in the presence of process variations of nano-CMOS technologies. The authors show very large-scale integration (VLSI) researchers and engineers how to minimize the different types of power consumption of digital circuits. The material deals primarily with high-level (architectural or behavioral) energy dissipation because the behavioral level is not as highly abstracted as the system level nor is it as complex as the gate/transistor level. At the behavioral level there is a balanced degree of freedom to explore power reduction mechanisms, the power reduction opportunities are greater, and it can cost-effectively help in investigating lower power design alternatives prior to actual circuit layout or silicon implementation. The book is a self-contained low-power, high-level synthesis text for Nanoscale VLSI design engineers and researchers. Each chapter has simple relevant examples for a better grasp of the principles presented. Several algorithms are given to provide a better understanding of the underlying concepts. The initial chapters deal with the basics of high-level synthesis, power dissipation mechanisms, and power estimation. In subsequent parts of the text, a detailed discussion of methodologies for the reduction of different types of power is presented including: • Power Reduction Fundamentals • Energy or Average Power Reduction • Peak Power Reduction • Transient Power Reduction • Leakage Power Reduction Low-Power High-Level Synthesis for Nanoscale CMOS Circuits provides a valuable resource for the design of low-power CMOS circuits.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element ENGINEERING.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element COMPUTER HARDWARE.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element COMPUTER AIDED DESIGN.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element COMPUTER ENGINEERING.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element ELECTRONICS.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element SYSTEMS ENGINEERING.
650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element ENGINEERING.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element ELECTRICAL ENGINEERING.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element COMPUTER HARDWARE.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element COMPUTER-AIDED ENGINEERING (CAD, CAE) AND DESIGN.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element ELECTRONICS AND MICROELECTRONICS, INSTRUMENTATION.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element CIRCUITS AND SYSTEMS.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Kougianos, Elias.
Relator term author.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Ranganathan, Nagarajan.
Relator term author.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Mohanty, Saraju P.
Relator term author.
710 2# - ADDED ENTRY--CORPORATE NAME
Corporate name or jurisdiction name as entry element SpringerLink (Online service)
773 0# - HOST ITEM ENTRY
Title Springer eBooks
776 08 - ADDITIONAL PHYSICAL FORM ENTRY
Relationship information Printed edition:
International Standard Book Number 9780387764733
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier <a href="http://dx.doi.org/10.1007/978-0-387-76474-0">http://dx.doi.org/10.1007/978-0-387-76474-0</a>
Public note Ver el texto completo en las instalaciones del CICY
912 ## -
-- ZDB-2-ENG
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Source of classification or shelving scheme Dewey Decimal Classification
Koha item type Libros electrónicos
Holdings
Lost status Source of classification or shelving scheme Damaged status Not for loan Collection Home library Current library Shelving location Date acquired Total checkouts Date last seen Price effective from Koha item type
  Dewey Decimal Classification     Libro electrónico CICY CICY Libro electrónico 10.07.2025   10.07.2025 10.07.2025 Libros electrónicos