Wafer Level 3-D ICs Process Technology (Record no. 58787)

MARC details
000 -LEADER
fixed length control field 03333nam a22004815i 4500
001 - CONTROL NUMBER
control field 978-0-387-76534-1
003 - CONTROL NUMBER IDENTIFIER
control field DE-He213
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20250710084024.0
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION
fixed length control field cr nn 008mamaa
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 100301s2008 xxu| s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9780387765341
-- 99780387765341
024 7# - OTHER STANDARD IDENTIFIER
Standard number or code 10.1007/978-0-387-76534-1
Source of number or code doi
100 1# - MAIN ENTRY--PERSONAL NAME
Personal name Tan, Chuan Seng.
Relator term editor.
245 10 - TITLE STATEMENT
Title Wafer Level 3-D ICs Process Technology
Medium [recurso electrónico] /
Statement of responsibility, etc. edited by Chuan Seng Tan, Ronald J. Gutmann, L. Rafael Reif.
264 #1 - PRODUCTION, PUBLICATION, DISTRIBUTION, MANUFACTURE, AND COPYRIGHT NOTICE
Place of production, publication, distribution, manufacture Boston, MA :
Name of producer, publisher, distributor, manufacturer Springer US,
Date of production, publication, distribution, manufacture, or copyright notice 2008.
300 ## - PHYSICAL DESCRIPTION
Extent XII, 410p.
Other physical details online resource.
336 ## - CONTENT TYPE
Content type term text
Content type code txt
Source rdacontent
337 ## - MEDIA TYPE
Media type term computer
Media type code c
Source rdamedia
338 ## - CARRIER TYPE
Carrier type term recurso en línea
Carrier type code cr
Source rdacarrier
347 ## - DIGITAL FILE CHARACTERISTICS
File type text file
Encoding format PDF
Source rda
490 1# - SERIES STATEMENT
Series statement Integrated Circuits and Systems,
International Standard Serial Number 1558-9412
505 0# - FORMATTED CONTENTS NOTE
Formatted contents note Overview of Wafer-Level 3D ICs -- Monolithic 3D Integrated Circuits -- Stacked CMOS Technologies -- Wafer-Bonding Technologies and Strategies for 3D ICs -- Through-Silicon Via Fabrication, Backgrind, and Handle Wafer Technologies -- Cu Wafer Bonding for 3D IC Applications -- Cu/Sn Solid-Liquid Interdiffusion Bonding -- An SOI-Based 3D Circuit Integration Technology -- 3D Fabrication Options for High-Performance CMOS Technology -- 3D Integration Based upon Dielectric Adhesive Bonding -- Direct Hybrid Bonding -- 3D Memory -- Circuit Architectures for 3D Integration -- Thermal Challenges of 3D ICs -- Status and Outlook.
520 ## - SUMMARY, ETC.
Summary, etc. Wafer Level 3-D ICs Process Technology focuses on foundry-based process technology that enables the fabrication of 3-D ICs. The core of the book discusses alternative technology platforms for pre-packaging wafer level 3-D ICs, with an emphasis on wafer-to-wafer stacking. Driven by the need for improved performance, a number of companies, consortia and universities are researching methods to use short, monolithically-fabricated, vertical interconnections to replace the long interconnects found in 2-D ICs. Stacking disparate technologies to provide various combinations of densely-packed functions, such as logic, memory, MEMS, displays, RF, mixed-signal, sensors, and power delivery is potentially possible with 3-D heterogeneous integration, making this technology the "Holy Grail" of system integration. Wafer Level 3-D ICs Process Technology is an edited book based on chapters contributed by various experts in the fields of wafer-level 3-D ICs process technology and applications enabled by 3-D integration.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element ENGINEERING.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element ELECTRONICS.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element OPTICAL MATERIALS.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element SURFACES (PHYSICS).
650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element ENGINEERING.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element ELECTRONICS AND MICROELECTRONICS, INSTRUMENTATION.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element OPTICAL AND ELECTRONIC MATERIALS.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element SURFACES AND INTERFACES, THIN FILMS.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element ENGINEERING, GENERAL.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Gutmann, Ronald J.
Relator term editor.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Reif, L. Rafael.
Relator term editor.
710 2# - ADDED ENTRY--CORPORATE NAME
Corporate name or jurisdiction name as entry element SpringerLink (Online service)
773 0# - HOST ITEM ENTRY
Title Springer eBooks
776 08 - ADDITIONAL PHYSICAL FORM ENTRY
Relationship information Printed edition:
International Standard Book Number 9780387765327
830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE
Uniform title Integrated Circuits and Systems,
International Standard Serial Number 1558-9412
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier <a href="http://dx.doi.org/10.1007/978-0-387-76534-1">http://dx.doi.org/10.1007/978-0-387-76534-1</a>
Public note Ver el texto completo en las instalaciones del CICY
912 ## -
-- ZDB-2-ENG
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Source of classification or shelving scheme Dewey Decimal Classification
Koha item type Libros electrónicos
Holdings
Lost status Source of classification or shelving scheme Damaged status Not for loan Collection Home library Current library Shelving location Date acquired Total checkouts Date last seen Price effective from Koha item type
  Dewey Decimal Classification     Libro electrónico CICY CICY Libro electrónico 10.07.2025   10.07.2025 10.07.2025 Libros electrónicos