High Speed Serdes Devices and Applications [electronic resource] / by James Donald Rockrohr, Amanullah Mohammad, Clarence Rosser Ogilvie, Kent Dramstad, Michael A. Sorna, Jeanne Trinko Mechler, David Robert Stauffer.

Serdes Concepts -- HSS Features and Functions -- HSS Architecture and Design -- Protocol Logic and Specifications -- Overview of Protocol Standards -- Reference Clocks -- Test and Diagnostics -- Signal Integrity -- Power Analysis -- Chip Integration.

High Speed Serdes Devices and Applications provides a broad understanding of High Speed Serdes (HSS) device usage. The material focuses on HSS devices, and the consolidation of related topics into a single text. Chip and system designers using HSS devices must have detailed knowledge of both the features and functions of the HSS device, and the applications in which they are used. Also designers must have a working knowledge of related subjects, including: reference clock architectures, signal integrity, power dissipation, and test features and functions. The authors consolidate these topics with a specific focus on HSS devices. This approach provides the chip designer sufficient background information for using HSS devices on their chips. The chapters can be viewed as four distinct sections. The first section relates to the features, functions, and design of HSS devices. Second are chapters that describe the features and functions of protocol logic used to implement various network protocol interface standards. The third section covers specialized topics related to HSS cores. Finally, characteristics of typical design kit models to facilitate integration within the chip design are discussed. High Speed Serdes Devices and Applications is a useful resource for chip designers using HSS devices in their chip design.