TY  - BOOK
AU  - Shu,Keliu
AU  - Sánchez-Sinencio,Edgar
ED  - SpringerLink (Online service)
TI  - CMOS PLL Synthesizers: Analysis and Design
T2  - The International Series in Engineering and Computer Science, Analog Circuits and Signal Processing,
SN  - 9780387236698
U1  - 621.3 23
PY  - 2005///
CY  - Boston, MA
PB  - Springer US
KW  - ENGINEERING
KW  - ELECTRONIC AND COMPUTER ENGINEERING
N1  - Frequency Synthesizer for Wireless Applications -- PLL Frequency Synthesizer -- ?? Fractional-N PLL Synthesizer -- Enhanced Phase Switching Prescaler -- Loop Filter with Capacitance Multiplier -- Other Building Blocks of PLL -- Prototype Measurement Results -- Conclusions
N2  - CMOS PLL Synthesizers: Analysis and Design presents both fundamentals and state of the art PLL synthesizer design and analysis techniques. A complete overview of both system-level and circuit-level design and analysis are covered. A 16mW, 2.4GHz, sub-2V, S D fractional-N synthesizer prototype is implemented in 0.35mm CMOS. It features a high-speed and robust phase-switching prescaler, and a low-complexity and area-efficient loop capacitance mulitplier, which elegantly tackle speed and integration bottlenecks of PLL synthesizer. This book is useful as a PLL synthesizer manual for both academic researchers and industry design engineers
UR  - http://dx.doi.org/10.1007/b102174
ER  -