Fully-Depleted SOI CMOS Circuits and Technology for Ultralow-Power Applications / [recurso electrónico] :
by Takayasu Sakurai, Akira Matsuzawa, Takakuni Douseki.
- XV, 411 p. online resource.
FD-SOI Device and Process Technologies -- Ultralow-Power Circuit Design with FD-SOI Devices -- 0.5-V MTCMOS/SOI Digital Circuits -- 0.5-1V MTCMOS/SOI Analog/RF Circuits -- SPICE Model for SOI MOSFETs -- Applications -- Prospects for FD-SOI Technology.
The most important issue confronting CMOS technology is the power explosion of chips arising from the scaling law. Fully-depleted (FD) SOI technology provides a promising low-power solution to chip implementation. Ultralow-power VLSIs, which have a power consumption of less than 10 mW, will be key components of terminals in the coming ubiquitous-IT society. Fully-depleted SOI CMOS Circuits and Technology for Ultralow-Power Applications addresses the problem of reducing the supply voltage of conventional circuits for ultralow-power operation and explains power-efficient MTCMOS circuit design for FD-SOI devices at a supply voltage of 0.5 V. The topics include the minimum required knowledge of the fabrication of SOI substrates; FD-SOI devices and the latest developments in device and process technologies; and ultralow-voltage circuits, such as digital circuits, analog/RF circuits, and DC-DC converters. Each ultra-low-power technique related to devices and circuits is fully explained using figures to help understanding. The authors present three examples of ultralow-power systems based on FD-SOI technology, providing every reader with practical knowledge on the technology and the circuits.
9780387292182 99780387292182
10.1007/978-0-387-29218-2 doi
ENGINEERING. COMPUTER HARDWARE. ENGINEERING DESIGN. ELECTRONICS. SYSTEMS ENGINEERING. NANOTECHNOLOGY. ENGINEERING. CIRCUITS AND SYSTEMS. ELECTRONIC AND COMPUTER ENGINEERING. ENGINEERING DESIGN. ELECTRONICS AND MICROELECTRONICS, INSTRUMENTATION. COMPUTER HARDWARE. NANOTECHNOLOGY.