000			03242nam a22004695i 4500
001			978-0-387-25624-5
003			DE-He213
005			20250710083934.0
007			cr nn 008mamaa
008			100301s2005 xxu| s |||| 0|eng d
020			_a9780387256245 _a99780387256245
024	7		_a10.1007/b135763 _2doi
082	0	4	_a621.3 _223
100	1		_aLarsson, Erik. _eauthor.
245	1	0	_aIntroduction to Advanced System-on-Chip Test Design and Optimization _h[recurso electrónico] / _cby Erik Larsson.
264		1	_aBoston, MA : _bSpringer US, _c2005.
300			_aXVI, 388 p. _bonline resource.
336			_atext _btxt _2rdacontent
337			_acomputer _bc _2rdamedia
338			_arecurso en línea _bcr _2rdacarrier
347			_atext file _bPDF _2rda
490	1		_aFrontiers in Electronic Testing, _x0929-1296 ; _v29
505	0		_aTesting Concepts -- Design Flow -- Design for Test -- Boundary Scan -- SOC Design for Testability -- System Modeling -- Test Conflicts -- Test Power Dissipation -- Test Access Mechanism -- Test Scheduling -- SOC Test Applications -- A Reconfigurable Power-Conscious Core Wrapper and its Application to System-on-Chip Test Scheduling -- An Integrated Framework for the Design and Optimization of SOC Test Solutions -- Efficient Test Solutions for Core-Based Designs -- Core Selection in the SOC Test Design-Flow -- Defect-Aware Test Scheduling -- An Integrated Technique for Test Vector Selection and Test Scheduling under ATE Memory Depth Constraint.
520			_aSOC test design and its optimization is the topic of Introduction to Advanced System-on-Chip Test Design and Optimization. It gives an introduction to testing, describes the problems related to SOC testing, discusses the modeling granularity and the implementation into EDA (electronic design automation) tools. The book is divided into three sections: i) test concepts, ii) SOC design for test, and iii) SOC test applications. The first part covers an introduction into test problems including faults, fault types, design-flow, design-for-test techniques such as scan-testing and Boundary Scan. The second part of the book discusses SOC related problems such as system modeling, test conflicts, power consumption, test access mechanism design, test scheduling and defect-oriented scheduling. Finally, the third part focuses on SOC applications, such as integrated test scheduling and TAM design, defect-oriented scheduling, and integrating test design with the core selection process.
650		0	_aENGINEERING.
650		0	_aENGINEERING DESIGN.
650		0	_aELECTRONICS.
650		0	_aOPTICAL MATERIALS.
650	1	4	_aENGINEERING.
650	2	4	_aELECTRONIC AND COMPUTER ENGINEERING.
650	2	4	_aELECTRONICS AND MICROELECTRONICS, INSTRUMENTATION.
650	2	4	_aENGINEERING DESIGN.
650	2	4	_aOPTICAL AND ELECTRONIC MATERIALS.
710	2		_aSpringerLink (Online service)
773	0		_tSpringer eBooks
776	0	8	_iPrinted edition: _z9781402032073
830		0	_aFrontiers in Electronic Testing, _x0929-1296 ; _v29
856	4	0	_uhttp://dx.doi.org/10.1007/b135763 _zVer el texto completo en las instalaciones del CICY
912			_aZDB-2-ENG
942			_2ddc _cER
999			_c56460 _d56460