000			03616nam a22005295i 4500
001			978-0-387-28133-9
003			DE-He213
005			20250710083940.0
007			cr nn 008mamaa
008			100301s2006 xxu| s |||| 0|eng d
020			_a9780387281339 _a99780387281339
024	7		_a10.1007/0-387-28133-9 _2doi
082	0	4	_a621.3815 _223
100	1		_aNarendra, Siva G. _eauthor.
245	1	0	_aLeakage in Nanometer CMOS Technologies _h[recurso electrónico] / _cby Siva G. Narendra, Anantha Chandrakasan.
264		1	_aBoston, MA : _bSpringer US, _c2006.
300			_aX, 307 p. _bonline resource.
336			_atext _btxt _2rdacontent
337			_acomputer _bc _2rdamedia
338			_arecurso en línea _bcr _2rdacarrier
347			_atext file _bPDF _2rda
490	1		_aSeries on Integrated Circuits and Systems, _x1558-9412
505	0		_aTaxonomy of Leakage: Sources, Impact, and Solutions -- Leakage Dependence on Input Vector -- Power Gating and Dynamic Voltage Scaling -- Methodologies for Power Gating -- Body Biasing -- Process Variation and Adaptive Design -- Memory Leakage Reduction -- Active Leakage Reduction and Multi-Performance Devices -- Impact of Leakage Power and Variation on Testing -- Case Study: Leakage Reduction in Hitachi/Renesas Microprocessors -- Case Study: Leakage Reduction in the Intel Xscale Microprocessor -- Transistor Design to Reduce Leakage.
520			_aThe goal of Leakage in Nanometer CMOS Technologies is to provide ample detail so that the reader can understand why leakage power components are becoming increasingly relevant in CMOS systems that use nanometer scale MOS devices. Leakage current sources at the MOS device level including sub-threshold and different types of tunneling are discussed in detail. The book covers promising solutions at the device, circuit, and architecture levels of abstraction. Manifestation of these MOS device leakage components at the full chip level depends considerably on several aspects including the nature of the circuit block, its state, its application workload, and Process/Voltage/Temperature conditions. The sensitivity of the various MOS leakage sources to these conditions are described from the first principles. The resulting manifestations are discussed at length to help the reader understand the effectiveness of leakage power reduction solutions under these different conditions. Case studies are presented to highlight real world examples that reap the benefits of leakage power reduction solutions. Finally, the book highlights different device design choices that exist to mitigate increases in the leakage components as technology scales.
650		0	_aENGINEERING.
650		0	_aCOMPUTER HARDWARE.
650		0	_aCOMPUTER AIDED DESIGN.
650		0	_aELECTRONICS.
650		0	_aSYSTEMS ENGINEERING.
650		0	_aNANOTECHNOLOGY.
650	1	4	_aENGINEERING.
650	2	4	_aCIRCUITS AND SYSTEMS.
650	2	4	_aCOMPUTER-AIDED ENGINEERING (CAD, CAE) AND DESIGN.
650	2	4	_aELECTRONICS AND MICROELECTRONICS, INSTRUMENTATION.
650	2	4	_aCOMPUTER HARDWARE.
650	2	4	_aELECTRONIC AND COMPUTER ENGINEERING.
650	2	4	_aNANOTECHNOLOGY.
700	1		_aChandrakasan, Anantha. _eauthor.
710	2		_aSpringerLink (Online service)
773	0		_tSpringer eBooks
776	0	8	_iPrinted edition: _z9780387257372
830		0	_aSeries on Integrated Circuits and Systems, _x1558-9412
856	4	0	_uhttp://dx.doi.org/10.1007/0-387-28133-9 _zVer el texto completo en las instalaciones del CICY
912			_aZDB-2-ENG
942			_2ddc _cER
999			_c56779 _d56779