000			04713nam a22004935i 4500
001			978-0-387-28487-3
003			DE-He213
005			20250710083942.0
007			cr nn 008mamaa
008			100301s2006 xxu| s |||| 0|eng d
020			_a9780387284873 _a99780387284873
024	7		_a10.1007/0-387-28487-7 _2doi
082	0	4	_a621.3815 _223
100	1		_aOmondi, Amos R. _eeditor.
245	1	0	_aFPGA Implementations of Neural Networks _h[recurso electrónico] / _cedited by Amos R. Omondi, Jagath C. Rajapakse.
264		1	_aBoston, MA : _bSpringer US, _c2006.
300			_aXII, 360 p. _bonline resource.
336			_atext _btxt _2rdacontent
337			_acomputer _bc _2rdamedia
338			_arecurso en línea _bcr _2rdacarrier
347			_atext file _bPDF _2rda
505	0		_aFPGA Neurocomputers -- On the Arithmetic Precision for Implementing Back-Propagation Networks on FPGA: A Case Study -- FPNA: Concepts and Properties -- FPNA: Applications and Implementations -- Back-Propagation Algorithm Achieving 5 Gops on the Virtex-E -- FPGA Implementation of Very Large Associative Memories -- FPGA Implementations of Neocognitrons -- Self Organizing Feature Map for Color Quantization on FPGA -- Implementation of Self-Organizing Feature Maps in Reconfigurable Hardware -- FPGA Implementation of a Fully and Partially Connected MLP -- FPGA Implementation of Non-Linear Predictors -- The REMAP Reconfigurable Architecture: A Retrospective.
520			_aThe development of neural networks has now reached the stage where they are employed in a large variety of practical contexts. However, to date the majority of such implementations have been in software. While it is generally recognised that hardware implementations could, through performance advantages, greatly increase the use of neural networks, to date the relatively high cost of developing Application-Specific Integrated Circuits (ASICs) has meant that only a small number of hardware neurocomputers has gone beyond the research-prototype stage. The situation has now changed dramatically: with the appearance of large, dense, highly parallel FPGA circuits it has now become possible to envisage putting large-scale neural networks in hardware, to get high performance at low costs. This in turn makes it practical to develop hardware neural-computing devices for a wide range of applications, ranging from embedded devices in high-volume/low-cost consumer electronics to large-scale stand-alone neurocomputers. Not surprisingly, therefore, research in the area has recently rapidly increased, and even sharper growth can be expected in the next decade or so. Nevertheless, the many opportunities offered by FPGAs also come with many challenges, since most of the existing body of knowledge is based on ASICs (which are not as constrained as FPGAs). These challenges range from the choice of data representation, to the implementation of specialized functions, through to the realization of massively parallel neural networks; and accompanying these are important secondary issues, such as development tools and technology transfer. All these issues are currently being investigated by a large number of researchers, who start from different bases and proceed by different methods, in such a way that there is no systematic core knowledge to start from, evaluate alternatives, validate claims, and so forth. FPGA Implementations of Neural Networks aims to be a timely one that fill this gap in three ways: First, it will contain appropriate foundational material and therefore be appropriate for advanced students or researchers new to the field. Second, it will capture the state of the art, in both depth and breadth and therefore be useful researchers currently active in the field. Third, it will cover directions for future research, i.e. embryonic areas as well as more speculative ones.
650		0	_aENGINEERING.
650		0	_aCOMPUTER SCIENCE.
650		0	_aSOFTWARE ENGINEERING.
650		0	_aENGINEERING DESIGN.
650		0	_aSYSTEMS ENGINEERING.
650	1	4	_aENGINEERING.
650	2	4	_aCIRCUITS AND SYSTEMS.
650	2	4	_aCOMPUTER SCIENCE, GENERAL.
650	2	4	_aENGINEERING DESIGN.
650	2	4	_aSPECIAL PURPOSE AND APPLICATION-BASED SYSTEMS.
650	2	4	_aELECTRONIC AND COMPUTER ENGINEERING.
650	2	4	_aPROCESSOR ARCHITECTURES.
700	1		_aRajapakse, Jagath C. _eeditor.
710	2		_aSpringerLink (Online service)
773	0		_tSpringer eBooks
776	0	8	_iPrinted edition: _z9780387284859
856	4	0	_uhttp://dx.doi.org/10.1007/0-387-28487-7 _zVer el texto completo en las instalaciones del CICY
912			_aZDB-2-ENG
942			_2ddc _cER
999			_c56829 _d56829