000			02850nam a22004575i 4500
001			978-0-387-29366-0
003			DE-He213
005			20250710083944.0
007			cr nn 008mamaa
008			100301s2006 xxu| s |||| 0|eng d
020			_a9780387293660 _a99780387293660
024	7		_a10.1007/0-387-29366-3 _2doi
082	0	4	_a621.3815 _223
100	1		_aElgamel, Mohamed A. _eauthor.
245	1	0	_aInterconnect Noise Optimization in Nanometer Technologies _h[recurso electrónico] / _cby Mohamed A. Elgamel, Magdy A. Bayoumi.
264		1	_aBoston, MA : _bSpringer US, _c2006.
300			_aXIX, 137 p. _bonline resource.
336			_atext _btxt _2rdacontent
337			_acomputer _bc _2rdamedia
338			_arecurso en línea _bcr _2rdacarrier
347			_atext file _bPDF _2rda
505	0		_aNoise Analysis and Design in Deep Submicron -- Interconnect Noise Analysis and Optimization Techniques -- Crosstalk Noise Analysis in Ultra Deep Submicrometer Technologies -- Minimum Area Shield Insertion for Inductive Noise Reduction -- Spacing Algorithms for Crosstalk Noise Reduction -- Post Layout Interconnect Optimization for Crosscoupling Noise Reduction -- 3D Integration -- EDA Industry Tools: State of the ART.
520			_aInterconnect has become the dominating factor in determining system performance in nanometer technologies. Dedicated to this subject, Interconnect Noise Optimization in Nanometer Technologies provides insight and intuition into layout analysis and optimization for interconnect in high speed, high complexity integrated circuits. The authors bring together a wealth of information presenting a range of CAD algorithms and techniques for synthesizing and optimizing interconnect. Practical aspects of the algorithms and the models are explained with sufficient details. The book investigates the most effective parameters in layout optimization. Different post-layout optimization techniques with complexity analysis and benchmarks tests are provided. The impact crosstalk noise and coupling on the wire delay is analyzed. Parameters that affect signal integrity are also considered.
650		0	_aENGINEERING.
650		0	_aCOMPUTER HARDWARE.
650		0	_aCOMPUTER AIDED DESIGN.
650		0	_aSYSTEMS ENGINEERING.
650	1	4	_aENGINEERING.
650	2	4	_aCIRCUITS AND SYSTEMS.
650	2	4	_aCOMPUTER-AIDED ENGINEERING (CAD, CAE) AND DESIGN.
650	2	4	_aCOMPUTER HARDWARE.
650	2	4	_aELECTRONIC AND COMPUTER ENGINEERING.
700	1		_aBayoumi, Magdy A. _eauthor.
710	2		_aSpringerLink (Online service)
773	0		_tSpringer eBooks
776	0	8	_iPrinted edition: _z9780387258706
856	4	0	_uhttp://dx.doi.org/10.1007/0-387-29366-3 _zVer el texto completo en las instalaciones del CICY
912			_aZDB-2-ENG
942			_2ddc _cER
999			_c56949 _d56949