000 03650nam a22004935i 4500
001 978-0-387-30416-8
003 DE-He213
005 20250710083946.0
007 cr nn 008mamaa
008 100301s2006 xxu| s |||| 0|eng d
020 _a9780387304168
_a99780387304168
024 7 _a10.1007/0-387-30416-9
_2doi
082 0 4 _a621.3815
_223
100 1 _aDoris, Konstantinos.
_eauthor.
245 1 0 _aWide-Bandwidth High-Dynamic Range D/A Converters
_h[recurso electrónico] /
_cby Konstantinos Doris, Arthu van Roermund, Domine Leenaerts.
264 1 _aBoston, MA :
_bSpringer US,
_c2006.
300 _aXVII, 204 p.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _arecurso en línea
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
490 1 _aThe International Series in Engineering and Computer Science,
_x0893-3405 ;
_v871
505 0 _aDigital to Analog conversion concepts -- Framework for Analysis and Synthesis of DACs -- Current Steering DACs -- Dynamic limitations of Current Steering DACs -- Current Steering DAC circuit error analysis -- High-level modeling of Current Steering DACs -- Functional modeling of timing errors -- Functional analysis of local timing errors -- Circuit analysis of local timing errors -- Synthesis concepts for CS DACs -- Design of a 12 bit 500 Msample/s DAC.
520 _aWide-bandwidth high dynamic range Digital to Analog Converters (D/A) are essential elements of modern systems, e.g. multi-carrier communication systems. Current Steering D/A converters offer the potential to achieve high dynamic range for wide frequency bandwidths, however, their performance at higher frequencies is usually limited by strong nonlinear behavior. This behavior is not well understood and impedes performance progress. Wide-Bandwidth High Dynamic Range D/A Converters presents a structured description of the operation principles and the nonlinear behavior of Current Steering D/A Converters, and shows ways to deal with it in the design phase. The book provides the reader a thorough understanding of error mechanisms at high frequencies. It explains their effects and shows their dependencies with parameters of the processed signal, the architecture, its circuit blocks and their implementations. A highlight of the book is the detailed treatment of timing errors caused by circuit imperfections due to process mismatch and clock interconnects. The book follows a unique approach, building an analysis and synthesis framework of concepts with a generic scope beyond the current steering architecture. The concepts are tested in practice with the design and measurements of a high performance 12b 500MSample/sec Current Steering Digital to Analog Converter realized in 0.18m m CMOS.
650 0 _aENGINEERING.
650 0 _aENGINEERING DESIGN.
650 0 _aELECTRONICS.
650 0 _aSYSTEMS ENGINEERING.
650 1 4 _aENGINEERING.
650 2 4 _aCIRCUITS AND SYSTEMS.
650 2 4 _aELECTRONIC AND COMPUTER ENGINEERING.
650 2 4 _aELECTRONICS AND MICROELECTRONICS, INSTRUMENTATION.
650 2 4 _aENGINEERING DESIGN.
700 1 _avan Roermund, Arthu.
_eauthor.
700 1 _aLeenaerts, Domine.
_eauthor.
710 2 _aSpringerLink (Online service)
773 0 _tSpringer eBooks
776 0 8 _iPrinted edition:
_z9780387304151
830 0 _aThe International Series in Engineering and Computer Science,
_x0893-3405 ;
_v871
856 4 0 _uhttp://dx.doi.org/10.1007/0-387-30416-9
_zVer el texto completo en las instalaciones del CICY
912 _aZDB-2-ENG
942 _2ddc
_cER
999 _c57050
_d57050