000 03188nam a22004935i 4500
001 978-0-387-34609-0
003 DE-He213
005 20250710083954.0
007 cr nn 008mamaa
008 100301s2006 xxu| s |||| 0|eng d
020 _a9780387346090
_a99780387346090
024 7 _a10.1007/0-387-34609-0
_2doi
082 0 4 _a621.3815
_223
100 1 _aSilva, Francisco.
_eauthor.
245 1 4 _aThe Core Test Wrapper Handbook
_h[recurso electrónico] :
_bRationale and Application of IEEE Std. 1500™ /
_cby Francisco Silva, Teresa McLaurin, Tom Waayers.
264 1 _aBoston, MA :
_bSpringer US,
_c2006.
300 _aXXIX, 276 p.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _arecurso en línea
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
490 1 _aFrontiers in Electronic Testing,
_x0929-1296 ;
_v35
505 0 _aWhat is the IEEE 1500 Standard? -- Why use the IEEE 1500 Standard? -- Illustration Example -- Design of the IEEE 1500 Interface Port -- Instruction Types -- Design of the WBR -- Design of the WBY -- Design of the WIR -- Hierarchical Cores -- Finalizing the Wrapper Solution for the EX Core -- SOC Integration of 1500 Compliant Cores.
520 _aThe Core Test Wrapper Handbook: Rationale and Application of IEEE Std. 1500TM provides insight into the rules and recommendations of IEEE Std. 1500. The authors present background information about some of the choices and decisions made throughout the design of this IEEE standard conceived to enable efficient core test reuse and debug at the SOC level. The Core Test Wrapper Handbook: Rationale and Application of IEEE Std. 1500TM focuses on practical design considerations and design choices inherent to the application of IEEE Std. 1500. This book teaches an engineer how to add a 1500 wrapper to their core in easy to understand steps. Starting with a bare core (a core without 1500 wrapper), the book progressively builds a 1500 compliant wrapper around this core while discussing overall requirements for each portion of the 1500 wrapper. The Core Test Wrapper Handbook: Rationale and Application of IEEE Std. 1500TM is a very valuable reference for professionals and researchers in the areas of design for test, design for test reuse/design reuse, and SOC implementation.
650 0 _aENGINEERING.
650 0 _aCOMPUTER AIDED DESIGN.
650 0 _aELECTRONICS.
650 0 _aSYSTEMS ENGINEERING.
650 1 4 _aENGINEERING.
650 2 4 _aCIRCUITS AND SYSTEMS.
650 2 4 _aCOMPUTER-AIDED ENGINEERING (CAD, CAE) AND DESIGN.
650 2 4 _aELECTRONICS AND MICROELECTRONICS, INSTRUMENTATION.
650 2 4 _aELECTRONIC AND COMPUTER ENGINEERING.
700 1 _aMcLaurin, Teresa.
_eauthor.
700 1 _aWaayers, Tom.
_eauthor.
710 2 _aSpringerLink (Online service)
773 0 _tSpringer eBooks
776 0 8 _iPrinted edition:
_z9780387307510
830 0 _aFrontiers in Electronic Testing,
_x0929-1296 ;
_v35
856 4 0 _uhttp://dx.doi.org/10.1007/0-387-34609-0
_zVer el texto completo en las instalaciones del CICY
912 _aZDB-2-ENG
942 _2ddc
_cER
999 _c57390
_d57390