| 000 | 03041nam a22004935i 4500 | ||
|---|---|---|---|
| 001 | 978-0-387-68953-1 | ||
| 003 | DE-He213 | ||
| 005 | 20250710084008.0 | ||
| 007 | cr nn 008mamaa | ||
| 008 | 100301s2007 xxu| s |||| 0|eng d | ||
| 020 |
_a9780387689531 _a99780387689531 |
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| 024 | 7 |
_a10.1007/978-0-387-68953-1 _2doi |
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| 082 | 0 | 4 |
_a621.3815 _223 |
| 100 | 1 |
_aChinnery, David. _eauthor. |
|
| 245 | 1 | 0 |
_aClosing the Power Gap Between ASIC & Custom _h[recurso electrónico] : _bTools and Techniques for Low Power Design / _cby David Chinnery, Kurt Keutzer. |
| 264 | 1 |
_aBoston, MA : _bSpringer US, _c2007. |
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| 300 | _bonline resource. | ||
| 336 |
_atext _btxt _2rdacontent |
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| 337 |
_acomputer _bc _2rdamedia |
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| 338 |
_arecurso en línea _bcr _2rdacarrier |
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| 347 |
_atext file _bPDF _2rda |
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| 505 | 0 | _aOverview of the Factors Affecting the Power Consumption -- Pipelining to Reduce the Power -- Voltage Scaling -- Methodology to Optimize Energy of Computation for SOCs -- Linear Programming for Gate Sizing -- Linear Programming for Multi-Vth and Multi-Vdd Assignment -- Power Optimization using Multiple Supply Voltages -- Placement for Power Optimization -- Power Gating Design Automation -- Verification For Multiple Supply Voltage Designs -- Winning the Power Struggle in an Uncertain Era -- Pushing ASIC Performance in a Power Envelope -- Low Power ARM 1136JF-S Design. | |
| 520 | _aThis book carefully details design tools and techniques for realizing low power and energy efficiency in a highly productive design methodology. Important topics include: - Microarchitectural techniques to reduce energy per operation - Power reduction with timing slack from pipelining - Analysis of the benefits of using multiple supply and threshold voltages - Placement techniques for multiple supply voltages - Verification for multiple voltage domains - Improved algorithms for gate sizing, and assignment of supply and threshold voltages - Power gating design automation to reduce leakage - Relationships among statistical timing, power analysis, and parametric yield optimization Design examples illustrate that these techniques can improve energy efficiency by two to three times. | ||
| 650 | 0 | _aENGINEERING. | |
| 650 | 0 | _aCOMPUTER HARDWARE. | |
| 650 | 0 | _aCOMPUTER AIDED DESIGN. | |
| 650 | 0 | _aCOMPUTER ENGINEERING. | |
| 650 | 0 | _aELECTRONICS. | |
| 650 | 0 | _aSYSTEMS ENGINEERING. | |
| 650 | 1 | 4 | _aENGINEERING. |
| 650 | 2 | 4 | _aCIRCUITS AND SYSTEMS. |
| 650 | 2 | 4 | _aCOMPUTER-AIDED ENGINEERING (CAD, CAE) AND DESIGN. |
| 650 | 2 | 4 | _aCOMPUTER HARDWARE. |
| 650 | 2 | 4 | _aELECTRONICS AND MICROELECTRONICS, INSTRUMENTATION. |
| 650 | 2 | 4 | _aELECTRICAL ENGINEERING. |
| 700 | 1 |
_aKeutzer, Kurt. _eauthor. |
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| 710 | 2 | _aSpringerLink (Online service) | |
| 773 | 0 | _tSpringer eBooks | |
| 776 | 0 | 8 |
_iPrinted edition: _z9780387257631 |
| 856 | 4 | 0 |
_uhttp://dx.doi.org/10.1007/978-0-387-68953-1 _zVer el texto completo en las instalaciones del CICY |
| 912 | _aZDB-2-ENG | ||
| 942 |
_2ddc _cER |
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| 999 |
_c58060 _d58060 |
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