000			03308nam a22004695i 4500
001			978-0-387-71056-3
003			DE-He213
005			20250710084011.0
007			cr nn 008mamaa
008			100301s2009 xxu| s |||| 0|eng d
020			_a9780387710563 _a99780387710563
024	7		_a10.1007/978-0-387-71056-3 _2doi
082	0	4	_a621.3815 _223
100	1		_aKourtev, Ivan S. _eeditor.
245	1	0	_aTiming Optimization Through Clock Skew Scheduling _h[recurso electrónico] / _cedited by Ivan S. Kourtev, Baris Taskin, Eby G. Friedman.
264		1	_aBoston, MA : _bSpringer US, _c2009.
300			_bonline resource.
336			_atext _btxt _2rdacontent
337			_acomputer _bc _2rdamedia
338			_arecurso en línea _bcr _2rdacarrier
347			_atext file _bPDF _2rda
505	0		_aVLSI Systems -- Signal Delay in VLSI Systems -- Timing Properties of Synchronous Systems -- Clock Skew Scheduling and Clock Tree Synthesis -- Clock Skew Scheduling of Level-Sensitive Circuits -- Clock Skew Scheduling for Improved Reliability -- Delay Insertion and Clock Skew Scheduling -- Practical Considerations -- Clock Skew Scheduling in Rotary Clocking Technology -- Experimental Results.
520			_aTiming Optimization Through Clock Skew Scheduling focuses on optimizing the timing of large scale, high performance, digital synchronous systems. A particular emphasis is placed on algorithms for non-zero clock skew scheduling to improve the performance and reliability of VLSI circuits. This research monograph answers the need for a broad introduction to state-of-the-art clock skew scheduling algorithms from a circuit, graph, and mathematical optimization background. A detailed description of clock skew scheduling application on edge-triggered and level-sensitive circuits, synchronized with single and multi-phase clocking schemes, and formulated as linear programming (LP) and quadratic programming (QP) formulations are provided along with an analysis of optimal computer solution techniques. Theoretical limits of improvement in clock frequency through clock skew scheduling are highlighted. Hints and a preliminary implementation of a parallel skew scheduling application are also included. Timing Optimization Through Clock Skew Scheduling contains sufficient detail for the advanced CAD algorithm developer, researcher and graduate student. Furthermore, with the material provided on timing properties and optimization, those readers with less background can also benefit from this book.
650		0	_aENGINEERING.
650		0	_aCOMPUTER AIDED DESIGN.
650		0	_aELECTRONICS.
650		0	_aSYSTEMS ENGINEERING.
650	1	4	_aENGINEERING.
650	2	4	_aCIRCUITS AND SYSTEMS.
650	2	4	_aCOMPUTER-AIDED ENGINEERING (CAD, CAE) AND DESIGN.
650	2	4	_aELECTRONICS AND MICROELECTRONICS, INSTRUMENTATION.
650	2	4	_aELECTRONIC AND COMPUTER ENGINEERING.
700	1		_aTaskin, Baris. _eeditor.
700	1		_aFriedman, Eby G. _eeditor.
710	2		_aSpringerLink (Online service)
773	0		_tSpringer eBooks
776	0	8	_iPrinted edition: _z9780387710556
856	4	0	_uhttp://dx.doi.org/10.1007/978-0-387-71056-3 _zVer el texto completo en las instalaciones del CICY
912			_aZDB-2-ENG
942			_2ddc _cER
999			_c58201 _d58201