000			03724nam a22004815i 4500
001			978-0-387-71601-5
003			DE-He213
005			20250710084013.0
007			cr nn 008mamaa
008			100301s2008 xxu| s |||| 0|eng d
020			_a9780387716015 _a99780387716015
024	7		_a10.1007/978-0-387-71601-5 _2doi
082	0	4	_a621.3815 _223
100	1		_aPopovich, Mikhhail. _eauthor.
245	1	0	_aPower Distribution Networks with On-Chip Decoupling Capacitors _h[recurso electrónico] / _cby Mikhhail Popovich, Andrey V. Mezhiba, Eby G. Friedman.
264		1	_aBoston, MA : _bSpringer US, _c2008.
300			_aXXXII, 515 p. _bonline resource.
336			_atext _btxt _2rdacontent
337			_acomputer _bc _2rdamedia
338			_arecurso en línea _bcr _2rdacarrier
347			_atext file _bPDF _2rda
505	0		_aInductive Properties of Electric Circuits -- Properties of On-Chip Inductive Current Loops -- Electromigration -- High Performance Power Distribution Systems -- Decoupling Capacitance -- On-Chip Power Distribution Networks -- Computer-Aided Design and Analysis -- Inductive Properties of On-Chip Power Distribution Grids -- Variation of Grid Inductance with Frequency -- Inductance/Area/Resistance Tradeoffs -- Scaling Trends of On-Chip Power Distribution Noise -- Impedance Characteristics of Multi-Layer Grids -- Multiple On-Chip Power Supply Systems -- On-Chip Power Distribution Grids with Multiple Supply Voltages -- Decoupling Capacitors for Multi-Voltage Power Distribution Systems -- On-chip Power Noise Reduction Techniques in High Performance ICs -- Effective Radii of On-Chip Decoupling Capacitors -- Efficient Placement of Distributed On-Chip Decoupling Capacitors -- Impedance/Noise Issues in On-Chip Power Distribution Networks -- Conclusions.
520			_aPower Distribution Networks with On-Chip Decoupling Capacitors is dedicated to distributing power in high speed, high complexity integrated circuits with power levels exceeding tens of watts and the power supply below a volt. The book provides insight and intuition into the behavior and design of integrated circuit-based power distribution systems. The book has three primary objectives. The first is to describe the impedance characteristics of the overall power distribution system, from the voltage regulator through the printed circuit board and package onto the integrated circuit to the power terminals of the on-chip circuitry. The second is to discuss the inductive characteristics of on-chip power distribution grids and the related circuit behavior of these structures. The third objective is to present design methodologies for effciently placing on-chip decoupling capacitors in nanoscale integrated circuits. Power Distribution Networks with On-Chip Decoupling Capacitors is a reference for professional engineers in the fields of circuits and systems and computer-aided design.
650		0	_aENGINEERING.
650		0	_aCOMPUTER AIDED DESIGN.
650		0	_aCOMPUTER ENGINEERING.
650		0	_aELECTRONICS.
650		0	_aSYSTEMS ENGINEERING.
650	1	4	_aENGINEERING.
650	2	4	_aCIRCUITS AND SYSTEMS.
650	2	4	_aELECTRONICS AND MICROELECTRONICS, INSTRUMENTATION.
650	2	4	_aCOMPUTER-AIDED ENGINEERING (CAD, CAE) AND DESIGN.
650	2	4	_aELECTRICAL ENGINEERING.
700	1		_aMezhiba, Andrey V. _eauthor.
700	1		_aFriedman, Eby G. _eauthor.
710	2		_aSpringerLink (Online service)
773	0		_tSpringer eBooks
776	0	8	_iPrinted edition: _z9780387716008
856	4	0	_uhttp://dx.doi.org/10.1007/978-0-387-71601-5 _zVer el texto completo en las instalaciones del CICY
912			_aZDB-2-ENG
942			_2ddc _cER
999			_c58263 _d58263