000			02892nam a22004455i 4500
001			978-1-4020-6536-1
003			DE-He213
005			20251006084534.0
007			cr nn 008mamaa
008			100301s2008 ne | s |||| 0|eng d
020			_a9781402065361
020			_a99781402065361
024	7		_a10.1007/978-1-4020-6536-1 _2doi
082	0	4	_a621.3815 _223
100	1		_aFey, Görschwin. _eauthor.
245	1	0	_aRobustness and Usability in Modern Design Flows _h[electronic resource] / _cby Görschwin Fey, Rolf Drechsler.
264		1	_aDordrecht : _bSpringer Netherlands, _c2008.
300			_bonline resource.
336			_atext _btxt _2rdacontent
337			_acomputer _bc _2rdamedia
338			_aonline resource _bcr _2rdacarrier
347			_atext file _bPDF _2rda
520			_aThe size of technically producible integrated circuits increases continuously. But the ability to design and verify these circuits does not keep up with this development. Therefore today's design flow has to be improved to achieve a higher productivity. In Robustness and Usability in Modern Design Flows the current design methodology and verification methodology are analyzed, a number of deficiencies are identified and solutions suggested. Improvements in the methodology as well as in the underlying algorithms are proposed. An in-depth presentation of preliminary concepts makes the book self-contained. Based on this foundation major design problems are targeted. In particular, a complete tool flow for Synthesis for Testability of SystemC descriptions is presented. The resulting circuits are completely testable and test pattern generation in polynomial time is possible. Verification issues are covered in even more detail. A whole new paradigm for formal design verification is suggested. This is based upon design understanding, the automatic generation of properties and powerful tool support for debugging failures. All these new techniques are empirically evaluated and experimental results are provided. As a result, an enhanced design flow is created that provides more automation (i.e. better usability) and reduces the probability of introducing conceptual errors (i.e. higher robustness).
650		0	_aENGINEERING.
650		0	_aCOMPUTER SCIENCE.
650		0	_aELECTRONICS.
650		0	_aSYSTEMS ENGINEERING.
650	1	4	_aENGINEERING.
650	2	4	_aCIRCUITS AND SYSTEMS.
650	2	4	_aMATHEMATICAL LOGIC AND FORMAL LANGUAGES.
650	2	4	_aELECTRONICS AND MICROELECTRONICS, INSTRUMENTATION.
700	1		_aDrechsler, Rolf. _eauthor.
710	2		_aSpringerLink (Online service)
773	0		_tSpringer eBooks
776	0	8	_iPrinted edition: _z9781402065354
856	4	0	_uhttp://dx.doi.org/10.1007/978-1-4020-6536-1 _zVer el texto completo en las instalaciones del CICY
912			_aZDB-2-ENG
942			_2ddc _cER
999			_c61759 _d61759